| PART |
Description |
Maker |
| GS8170DD36C-333 GS8170DD36C-250 GS8170DD36C-300 GS |
18Mb x2Lp CMOS I/O Double Data Rate SigmaRAM 512K X 36 STANDARD SRAM, 2.1 ns, PBGA209
18Mb 1x2Lp CMOS I/O Double Data Rate SigmaRAM 35.71x2Lp的CMOS的I / O双数据速率SigmaRAM
|
GSI Technology, Inc.
|
| GS8170DD36C-333 GS8170DD36C-333I GS8170DD36C-300I |
18Mb Σ1x2Lp CMOS I/O Double Data Rate SigmaRAM
|
GSI Technology
http://
|
| GS8170DW36AC GS8170DW36AC-250 GS8170DW36AC-350 GS8 |
18Mb B>1x1Dp CMOS I/O Double Late Write SigmaRAM
18Mb x1Dp CMOS I/O Double Late Write SigmaRAM 512K X 36 STANDARD SRAM, 2.1 ns, PBGA209
18Mb x1Dp CMOS I/O Double Late Write SigmaRAM 512K X 36 STANDARD SRAM, 1.8 ns, PBGA209
18Mb x1Dp CMOS I/O Double Late Write SigmaRAM 35.7x1Dp的CMOS的I / O双晚SigmaRAM
18Mb x1Dp CMOS I/O Double Late Write SigmaRAM 256K X 72 STANDARD SRAM, 1.8 ns, PBGA209
|
GSI Technology, Inc.
|
| GS8170DW36C GS8170DW36C-200 GS8170DW36C-250 GS8170 |
18Mb B>1x1Dp CMOS I/O Double Late Write SigmaRAM
18Mb x1Dp CMOS I/O Double Late Write SigmaRAM 256K X 72 STANDARD SRAM, 2.25 ns, PBGA209
|
GSI Technology, Inc.
|
| GS8170DW72C-333I GS8170DW36C GS8170DW36C-200 GS817 |
18Mb ヒ1x1Dp CMOS I/O Double Late Write SigmaRAM
|
GSI[GSI Technology]
|
| H5MS5162EFR |
536,870,912-bit CMOS Low Power Double Data Rate Synchronous DRAM (Mobile DDR SDRAM)
|
Hynix Semiconductor
|
| GS8160Z36T-250I GS8160Z18T GS8160Z18T-133 GS8160Z1 |
18Mb Burst SRAMs
18Mb Pipelined and Flow Through Synchronous NBT SRAM
|
GSI[GSI Technology]
|
| GS8161Z36T-133 GS8161Z36T-133I GS8161Z36T-133T GS8 |
18Mb Burst SRAMs
18Mb Pipelined and Flow Through Synchronous NBT SRAM
|
GSI[GSI Technology]
|
| C1226 |
CMOS 1.2um 100V CMOS, Double Metal - Double Poly
|
IMP[IMP, Inc]
|
| M13S2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| NT5DS4M32EG-6 NT5DS4M32EG NT5DS4M32EG-5 NT5DS4M32E |
1M 】 32 Bits 】 4 Banks Double Data Rate Synchronous RAM With Bi-Directional Data Strobe and DLL
|
NANOAMP[NanoAmp Solutions, Inc.]
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
